Job Details
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| Principal Digital IC Engineer | | |
| Location | | Eastern ( Cambridgeshire ) | | |
Salary
Negotiable | | |
Benefits
£NEG + BENEFITS | | |
Application Deadline
19/08/2008 | | |
Description
PRINCIPAL DIGITAL IC ENGINEER / CAMBRIDGESHIRE / £NEG + BENEFITS
Rapidly expanding fabless semiconductor company seeks a Principal Digital IC Engineer for a key position implementing & verifying complex sections of UWB modem & MAC-layer hardware units in VHDL for incorporation into ASICs. To apply for this exciting position you must possess:
* Extensive knowledge of implementing algorithms & complex blocks for ASIC synthesis in VHDL (ideally Verilog)
* Understanding of good design practices for robustness of logic intended for an ASIC (metastability, clock & reset management, testability)
* Understanding of trade-offs in speed, area & power of particular design approaches; able to re-architect to optimise 1 or more of these parameters)
* Expertise with verification/debug of complex designs, including the use of simulation, code coverage etc
* Documenting work to a high standard
* Synthesis of DSM designs at 90nm & smaller, to include constraint generation, structural test, timing closure & interface to internal or subcontract layout resources
* Exp with complete chips rather than just subsystems, including DFT & integration issues
* Knowledge of OFDM systems and/or MAC architectures
* Exp to low-power design techniques
* Exp with at least 1 Formal Equivalence tool
* Familiar with Cadence or Magma synthesis & floor planning tools | | |
Reference
41877 | | |
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This job has now expired.
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